XMEGA Application Note | |||||
00001 /* This file has been prepared for Doxygen automatic documentation generation.*/ 00062 #include "avr_compiler.h" 00063 #include "ccpwrite.h" 00064 #include "sleepmgr.h" 00065 #include "lowpower.h" 00066 #include "rtc32_driver.h" 00067 00068 00070 #define RTC_PERIOD 8 00071 00073 #ifndef F_CPU 00074 #define F_CPU 2000000 00075 #endif // F_CPU 00076 00077 00079 uint8_t gState = 0; 00080 00081 00089 int main(void) 00090 { 00091 // Initialize device to the least power consuming state. 00092 LOWPOWER_Init(); 00093 00094 // Enable Flash and EEPROM power reduction modes. 00095 CCPWrite(&NVM.CTRLB, NVM_EPRM_bm | NVM_FPRM_bm); 00096 00097 // Initialize the sleep manager. 00098 SLEEPMGR_Init(); 00099 00100 // Clear bit for RTC in PRR (it is set by LOWPOWER_Init()). 00101 PR.PRGEN &= ~PR_RTC_bm; 00102 00103 // Reset the battery backup module. 00104 RTC32_Reset(); 00105 00106 // Configure and enable TOSC, then set up and enable the RTC32 module. 00107 RTC32_ToscEnable( false ); 00108 RTC32_Initialize( RTC_PERIOD, 0, RTC_PERIOD-1 ); 00109 00110 // Enable RTC compare interrupts. 00111 RTC32_SetCompareIntLevel( RTC32_COMPINTLVL_LO_gc ); 00112 PMIC.CTRL |= PMIC_LOLVLEN_bm; 00113 sei(); 00114 00115 // The device should first spend time in ACTIVE, so wait for 00116 // the RTC compare ISR to change the state. 00117 do { } while(gState == 0); 00118 00119 // Disable Flash power reduction mode due to errata. 00120 // (The device will spend most of its time in sleep from now on, so we 00121 // won't bother clearing/setting FPRM before and after sleep.) 00122 CCPWrite(&NVM.CTRLB, NVM_EPRM_bm); 00123 00124 // Go to sleep. The RTC compare ISR configures the sleep modes. 00125 do { 00126 SLEEPMGR_Sleep(); 00127 } while (1); 00128 } 00129 00130 00136 ISR(RTC32_COMP_vect) 00137 { 00138 switch(gState) { 00139 // The device starts out in active mode. Go to Idle. 00140 case 0: 00141 SLEEPMGR_Lock( SLEEPMGR_IDLE ); 00142 ++gState; 00143 break; 00144 00145 // Power-save follows after Idle. 00146 case 1: 00147 SLEEPMGR_Unlock( SLEEPMGR_IDLE ); 00148 SLEEPMGR_Lock( SLEEPMGR_SAVE ); 00149 ++gState; 00150 break; 00151 00152 // Power-down follows after Power-save. 00153 case 2: 00154 SLEEPMGR_Unlock( SLEEPMGR_SAVE ); 00155 SLEEPMGR_Lock( SLEEPMGR_DOWN ); 00156 ++gState; 00157 00158 // Disable interrupt to remain in sleep. (RTC32 will keep running.) 00159 RTC32_SetCompareIntLevel( RTC32_COMPINTLVL_OFF_gc ); 00160 break; 00161 00162 // Shouldn't end up here.. Go to Idle. 00163 default: 00164 SLEEPMGR_Init(); 00165 SLEEPMGR_Lock( SLEEPMGR_IDLE ); 00166 gState = 1; 00167 } 00168 }
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