XMEGA Application Note | |||||
#include "avr_compiler.h"
#include "ccpwrite.h"
#include "rtc_driver.h"
#include "sleepmgr.h"
#include "lowpower.h"
Go to the source code of this file.
Defines | |
#define | F_CPU 2000000 |
Define the CPU frequency, for use with delay_us(). (2 MHz is default clock.). | |
#define | RTC_PERIOD 5 |
Configure RTC wakeup period in seconds. (Approximate if ULP is used..). | |
#define | SLEEP_MODE SLEEPMGR_SAVE |
#define | USE_RTC |
Functions | |
ISR (RTC_COMP_vect) | |
int | main (void) |
The main RTC example. |
This file contains an example program which initializes the XMEGA 128A1 on the Xplain board to the least power consuming state, and puts the device to sleep.
By default, the XMEGA is put in POWER-SAVE mode, and wakes up every five seconds. The device stays in ACTIVE mode for 0.5 sec before going back to sleep. This gives a duty cycle of 10%.
The interval timing is done with the RTC and external 32 kHz crystal oscillator as clock source, which should result in less than 1 ľA current consumption.
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Definition in file xplain_sleep_example.c.
#define F_CPU 2000000 |
Define the CPU frequency, for use with delay_us(). (2 MHz is default clock.).
Definition at line 101 of file xplain_sleep_example.c.
#define RTC_PERIOD 5 |
Configure RTC wakeup period in seconds. (Approximate if ULP is used..).
Definition at line 96 of file xplain_sleep_example.c.
#define SLEEP_MODE SLEEPMGR_SAVE |
Specify which sleep mode to use.
The default alternatives are:
SLEEPMGR_IDLE - Idle SLEEPMGR_ESTDBY - Extended standby SLEEPMGR_SAVE - Power-save SLEEPMGR_STDBY - Standby SLEEPMGR_DOWN - Power-down
The device cannot wake itself up from Standby or Power-down because the RTC is disabled in these modes.
Definition at line 85 of file xplain_sleep_example.c.
#define USE_RTC |
Configure if RTC should be used. (Comment out otherwise.)
This wakes the device up at the specified number of seconds.
Definition at line 94 of file xplain_sleep_example.c.
ISR | ( | RTC_COMP_vect | ) |
int main | ( | void | ) |
The main RTC example.
This function initializes the XMEGA to the least power consuming state, before initializing the sleep manager and RTC as configured above.
The main loop doesn't do anything but put the device back to the configured sleep mode after a delay of 0.5 second.
Definition at line 112 of file xplain_sleep_example.c.
References CCPWrite(), LOWPOWER_Init(), RTC_Busy, RTC_Initialize(), RTC_PERIOD, RTC_SetCompareIntLevel(), SLEEP_MODE, SLEEPMGR_Init(), SLEEPMGR_Lock(), and SLEEPMGR_Sleep().
00113 { 00114 // Initialize to the least power consuming state. 00115 LOWPOWER_Init(); 00116 00117 // Enable EEPROM and Flash power reduction mode. 00118 CCPWrite(&NVM.CTRLB, NVM_EPRM_bm | NVM_FPRM_bm); 00119 00120 // Initialize the sleep manager, lock a sleep mode if configured. 00121 SLEEPMGR_Init(); 00122 #ifdef SLEEP_MODE 00123 SLEEPMGR_Lock( SLEEP_MODE ); 00124 #endif // SLEEP_MODE 00125 00126 00127 // If use of the RTC as interval timer is configured, set it up. 00128 #ifdef USE_RTC 00129 // Clear bit for RTC in PRR (set by LOWPOWER_Init()). 00130 PR.PRGEN &= ~PR_RTC_bm; 00131 00132 // Enable external 32 kHz XTAL oscillator in low-power mode for RTC. 00133 OSC.XOSCCTRL = OSC_XOSCSEL_32KHz_gc | OSC_X32KLPM_bm; 00134 OSC.CTRL |= OSC_XOSCEN_bm; 00135 00136 // Wait for oscillator to stabilize. 00137 do { } while (!( OSC.STATUS & OSC_XOSCRDY_bm )); 00138 00139 // Set the oscillator as clock source for RTC. 00140 CLK.RTCCTRL = CLK_RTCSRC_TOSC_gc | CLK_RTCEN_bm; 00141 00142 // Wait until RTC is ready. 00143 do { } while ( RTC_Busy() ); 00144 00145 // Configure RTC wakeup period. 00146 RTC_Initialize( RTC_PERIOD, 0, 0, RTC_PRESCALER_DIV1024_gc ); 00147 00148 // Enable the RTC compare interrupts so that the device can wake up. 00149 RTC_SetCompareIntLevel( RTC_COMPINTLVL_LO_gc ); 00150 PMIC.CTRL |= PMIC_LOLVLEN_bm; 00151 sei(); 00152 #endif // USE_RTC 00153 00154 // Main loop. 00155 do { 00156 /* On wake-up, stay in ACTIVE mode for 0.5 s and then go back to sleep. 00157 * 00158 * In an actual application, you would process events/data here. 00159 */ 00160 delay_us(500000); 00161 00162 // Due to errata, Flash power reduction mode should be disabled. 00163 CCPWrite(&NVM.CTRLB, NVM_EPRM_bm); 00164 00165 SLEEPMGR_Sleep(); 00166 00167 // Re-enable EEPROM and Flash power reduction mode after sleep. 00168 CCPWrite(&NVM.CTRLB, NVM_EPRM_bm | NVM_FPRM_bm); 00169 } while (1); 00170 }
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