Xmega Application Note


event_system_example.c

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00001 /* This file has been prepared for Doxygen automatic documentation generation.*/
00050 #include "avr_compiler.h"
00051 #include "event_system_driver.h"
00052 
00053 void Example1( void );
00054 void Example2( void );
00055 void Example3( void );
00056 void Example4( void );
00057 
00058 
00064 int main( void )
00065 {
00066 
00067         Example1();
00068         /*Example2();*/
00069         /*Example3();*/
00070         /*Example4();*/
00071 
00072         do {
00073 
00074         }while (1);
00075 }
00076 
00077 
00088 void Example1( void )
00089 {
00090         /* Configure PD0 as input, sense on both edges. */
00091         PORTD.PIN0CTRL |= PORT_ISC_BOTHEDGES_gc;
00092         PORTD.DIRCLR = 0x01;
00093 
00094         /* Select PD0 as event channel 0 multiplexer input. */
00095         EVSYS_SetEventSource( 0, EVSYS_CHMUX_PORTD_PIN0_gc );
00096 
00097         /*  Select event channel 0 as event source for TCC0 and input
00098          *  capture as event action.
00099          */
00100         TCC0.CTRLD = (uint8_t) TC_EVSEL_CH0_gc | TC_EVACT_CAPT_gc;
00101 
00102         /* Enable TCC0 "Compare or Capture" Channel A. */
00103         TCC0.CTRLB |= TC0_CCAEN_bm;
00104 
00105         /* Configure TCC0 with the desired frequency and period. */
00106         TCC0.PER = 0xFFFF;
00107         TCC0.CTRLA = TC_CLKSEL_DIV1_gc;
00108 
00109         while (1) {
00110                 if ( TCC0.INTFLAGS & TC0_CCAIF_bm ) {
00111                         /*  Clear interrupt flag when new value is captured.
00112                          *  The last capture value is now available
00113                          *  in the CCA register.
00114                          */
00115                         TCC0.INTFLAGS |= TC0_CCAIF_bm;
00116                 }
00117         }
00118 }
00119 
00120 
00130 void Example2( void )
00131 {
00132         /* Select TC overflow as event channel 0 multiplexer input. */
00133         EVSYS_SetEventSource( 0, EVSYS_CHMUX_TCC0_OVF_gc );
00134 
00135         /*  Configure ADC A event channel and configure which channels to sweep
00136          *  and enable channel sweep.
00137          */
00138         ADCA.EVCTRL = (uint8_t) ADC_SWEEP_0123_gc |
00139                       ADC_EVSEL_0123_gc |
00140                       ADC_EVACT_SWEEP_gc;
00141 
00142         /* Configure the input of the ADC cannels and single ended mode. */
00143         ADCA.CH0.MUXCTRL = (uint8_t) ADC_CH_MUXPOS_PIN4_gc | ADC_CH_MUXNEG_PIN0_gc;
00144         ADCA.CH0.CTRL = ADC_CH_INPUTMODE_SINGLEENDED_gc;
00145         ADCA.CH1.MUXCTRL = (uint8_t) ADC_CH_MUXPOS_PIN5_gc | ADC_CH_MUXNEG_PIN0_gc;
00146         ADCA.CH1.CTRL = ADC_CH_INPUTMODE_SINGLEENDED_gc;
00147         ADCA.CH2.MUXCTRL = (uint8_t) ADC_CH_MUXPOS_PIN6_gc | ADC_CH_MUXNEG_PIN0_gc;
00148         ADCA.CH2.CTRL = ADC_CH_INPUTMODE_SINGLEENDED_gc;
00149         ADCA.CH3.MUXCTRL = (uint8_t) ADC_CH_MUXPOS_PIN7_gc | ADC_CH_MUXNEG_PIN0_gc;
00150         ADCA.CH3.CTRL = ADC_CH_INPUTMODE_SINGLEENDED_gc;
00151 
00152 
00153         /*  Configure prescaler, resolution, singed mode and set voltage
00154          *  reference to internal Vcc - 0.6. Finally enable ADC.
00155          */
00156         ADCA.PRESCALER = ( ADCA.PRESCALER & ~ADC_PRESCALER_gm ) |
00157                          ADC_PRESCALER_DIV8_gc;
00158         ADCA.CTRLB = ( ADCA.CTRLB & ~ADC_RESOLUTION_gm ) |
00159                      ADC_RESOLUTION_12BIT_gc;
00160         ADCA.CTRLB = ( ADCA.CTRLB & ~( ADC_CONMODE_bm | ADC_FREERUN_bm ) );
00161         ADCA.REFCTRL = ( ADCA.REFCTRL & ~ADC_REFSEL_gm ) |
00162                        ADC_REFSEL_VCC_gc;
00163         ADCA.CTRLA |= ADC_ENABLE_bm;
00164 
00165         /* Configure TCC0 with the desired frequency and period. */
00166         TCC0.PER = 0xFFFF;
00167         TCC0.CTRLA = TC_CLKSEL_DIV1_gc;
00168 
00169         while (1) {
00170                 /* Wait while ADC sweeps on every TCC0 Overflow. */
00171         }
00172 }
00173 
00174 
00185 void Example3( void )
00186 {
00187         /* Configure PD0 as input, sense on both edges. */
00188         PORTD.PIN0CTRL = PORT_ISC_BOTHEDGES_gc;
00189         PORTD.DIRCLR = 0x01;
00190 
00191         /* Select TCC0 overflow as event channel 0 multiplexer input.
00192          * (Overflow propagation)
00193          */
00194         EVSYS_SetEventSource( 0, EVSYS_CHMUX_TCC0_OVF_gc );
00195 
00196         /* Select PD0 as event channel 1 multiplexer input. (Input capture) */
00197         EVSYS_SetEventSource( 1, EVSYS_CHMUX_PORTD_PIN0_gc );
00198 
00199         /* Select event channel 0 as clock source for TCC1. */
00200         TCC1.CTRLA = TC_CLKSEL_EVCH0_gc;
00201 
00202         /* Configure TCC0 for input capture. */
00203         TCC0.CTRLD = (uint8_t) TC_EVSEL_CH1_gc | TC_EVACT_CAPT_gc;
00204 
00205         /* Configure TCC1 for input capture with event delay. */
00206         TCC1.CTRLD = (uint8_t) TC_EVSEL_CH1_gc | TC0_EVDLY_bm | TC_EVACT_CAPT_gc;
00207 
00208         /* Enable Compare or Capture Channel A for both timers. */
00209         TCC0.CTRLB = TC0_CCAEN_bm;
00210         TCC1.CTRLB = TC1_CCAEN_bm;
00211 
00212         /* Select system clock as clock source for TCC0. */
00213         TCC0.CTRLA = TC_CLKSEL_DIV1_gc;
00214 
00215         while (1) {
00216                 if ( TCC0.INTFLAGS & TC0_CCAIF_bm ) {
00217                         /*  Clear interrupt flag when new value is captured.
00218                          *  The last capture value is now available
00219                          *  in the CCA register.
00220                          */
00221                         TCC0.INTFLAGS |= TC0_CCAIF_bm;
00222                         TCC1.INTFLAGS |= TC1_CCAIF_bm;
00223                 }
00224         }
00225 }
00226 
00235 void Example4( void )
00236 {
00237         /* Configure PD0 as input, sense on rising edge. */
00238         PORTD.PIN0CTRL = PORT_ISC_RISING_gc;
00239         PORTD.DIRCLR = 0x01;
00240 
00241         /* Configure port C to show result. */
00242         PORTC.DIRSET = 0xFF;
00243 
00244         /* Select PD0 as event channel 0 multiplexer input. */
00245         EVSYS_SetEventSource( 0, EVSYS_CHMUX_PORTD_PIN0_gc );
00246 
00247         /*  Set the digital filter on event channel 0 to maximum filter
00248          *  samples to filter out button bounces.
00249          */
00250         EVSYS_SetEventChannelFilter( 0, EVSYS_DIGFILT_8SAMPLES_gc );
00251 
00252         /* Configure TCC0 with period and event channel 0 as clock source. */
00253         TCC0.PER = 0xFFFF;
00254         TCC0.CTRLA = TC_CLKSEL_EVCH0_gc;
00255 
00256 
00257         while (1) {
00258                 /* Show the inverted value on the active low LEDs. */
00259                 PORTC.OUT = ~TCC0.CNT;
00260         }
00261 }
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Generated on Tue Apr 22 14:20:07 2008 for AVR1001 Getting Started With the XMEGA Event System by doxygen 1.5.5