Xmega Application Note | |||||
This file contains an example application that demonstrates the PMIC driver. It includes som simple setup code for Timer/Counter C and uses three compare match interrupts very close to each other to demonstrate how different interrupt levels interact.
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Definition in file pmic_example.c.
#include "avr_compiler.h"
#include "pmic_driver.h"
Go to the source code of this file.
Functions | |
ISR (TCC0_CCC_vect) | |
Timer Counter C0 Compare/Capture C. | |
ISR (TCC0_CCB_vect) | |
Timer Counter C0 Compare/Capture B. | |
ISR (TCC0_CCA_vect) | |
Timer Counter C0 Compare/Capture A. | |
int | main (void) |
Example function for the PMIC. | |
Variables | |
volatile uint8_t | compareMatchACount = 0 |
Counter incremented in Compare Match A handler. | |
volatile uint8_t | compareMatchBCount = 0 |
Counter incremented in Compare Match B handler. | |
volatile uint8_t | compareMatchCCount = 0 |
Counter incremented in Compare Match C handler. |
ISR | ( | TCC0_CCC_vect | ) |
Timer Counter C0 Compare/Capture C.
This routine increments compareMatchCCount each time it is called.
Definition at line 91 of file pmic_example.c.
References compareMatchCCount.
00092 { 00093 ++compareMatchCCount; 00094 }
ISR | ( | TCC0_CCB_vect | ) |
Timer Counter C0 Compare/Capture B.
This ISR increments compareMatchBCount each time it is called.
Definition at line 80 of file pmic_example.c.
References compareMatchBCount.
00081 { 00082 ++compareMatchBCount; 00083 }
ISR | ( | TCC0_CCA_vect | ) |
Timer Counter C0 Compare/Capture A.
This routine increments compareMatchACount each time it is called.
Definition at line 69 of file pmic_example.c.
References compareMatchACount.
00070 { 00071 ++compareMatchACount; 00072 }
int main | ( | void | ) |
Example function for the PMIC.
This function illustrates the use of the XMEGA PMIC.
In this example, a counter(Timer/Counter C0) is set to count continuously to 0xff. Three different compare match values are programmed to give three different types of interrupts, with different interrupt levels.
Compare match A (0x60) triggers a low level interrupt. Compare macth B (0x50) triggers a medium level interrupt. Compare macth C (0x70) triggers a high level interrupt.
When setup is complete, the main program enters an infinite loop, and the interrupt handling and counter values can be observed.
Definition at line 113 of file pmic_example.c.
References PMIC_EnableHighLevel, PMIC_EnableLowLevel, PMIC_EnableMediumLevel, and PMIC_SetVectorLocationToApplication().
00114 { 00115 /* Enable all interrupt levels. */ 00116 PMIC_SetVectorLocationToApplication(); 00117 PMIC_EnableLowLevel(); 00118 PMIC_EnableMediumLevel(); 00119 PMIC_EnableHighLevel(); 00120 sei(); 00121 00122 /* Set up Timer/Counter 0 with three Compare Match interrupts. */ 00123 TCC0.CTRLB = TC0_CCCEN_bm | TC0_CCBEN_bm | TC0_CCAEN_bm | TC_WGMODE_NORMAL_gc; 00124 TCC0.INTCTRLB = (uint8_t) TC_CCCINTLVL_HI_gc | TC_CCBINTLVL_MED_gc | TC_CCAINTLVL_LO_gc; 00125 TCC0.PER = 0xff; /* Period: 0xff */ 00126 TCC0.CCA = 0x60; /* Compare Match A, will need to wait for both Compare Match C and B. */ 00127 TCC0.CCB = 0x50; /* Compare Match B, will be interrupted by higher level Compare Match C. */ 00128 TCC0.CCC = 0x70; /* Compare Match C. */ 00129 00130 TCC0.CTRLA = TC_CLKSEL_DIV1_gc; /* Run at maximum speed. */ 00131 00132 while(true) { 00133 } 00134 }
volatile uint8_t compareMatchACount = 0 |
Counter incremented in Compare Match A handler.
Definition at line 61 of file pmic_example.c.
Referenced by ISR().
volatile uint8_t compareMatchBCount = 0 |
Counter incremented in Compare Match B handler.
Definition at line 58 of file pmic_example.c.
Referenced by ISR().
volatile uint8_t compareMatchCCount = 0 |
Counter incremented in Compare Match C handler.
Definition at line 55 of file pmic_example.c.
Referenced by ISR().
Generated on Wed Apr 23 07:41:41 2008 for AVR1305 XMEGA Interrupts and the Programmable Multi-level Interrupt Controller by ![]() |